[Submitted on 11 Apr 2025 (v1), last revised 27 Jul 2026 (this version, v3)]

Authors:Sujan Ghimire, Parsa Mirfasihi, Muhtasim Alam Chowdhury, Harish Kumar Dharavath, Banafsheh Saber Latibari, Muntasir Mamun, Jaeden Wolf Carpenter, Benjamin Tan, Hammond Pearce, Krishnendu Chakrabarty, Pratik Satam, Soheil Salehi

View PDF HTML (experimental)

Abstract:Recent advances in attention-based artificial intelligence (AI) models have unlocked vast potential to automate digital hardware design while enhancing and strengthening security measures against various threats. This rapidly emerging field leverages Large Language Models (LLMs) to generate HDL code, identify vulnerabilities, and sometimes mitigate them. The state of the art in this design automation space utilizes optimized LLMs with HDL datasets, creating automated systems for register transfer level (RTL) generation, verification, and debugging, and establishing LLM-driven design environments for streamlined logic designs. Additionally, attention-based models like graph attention have shown promise in chip design applications, including floorplanning. This survey investigates the integration of these models into hardware-related domains, emphasizing logic design and hardware security, with or without the use of IP libraries. This study explores the commercial and academic landscape, highlighting technical hurdles and future prospects for automating hardware design and security. Moreover, it provides new insights into the study of LLM-driven design systems, advances in hardware security mechanisms, and the impact of influential works on industry practices. Through the examination of 30 representative approaches and illustrative case studies, this paper underscores the transformative potential of attention-based models in revolutionizing hardware design while addressing the challenges that lie ahead in this interdisciplinary domain.

Submission history

From: Sujan Ghimire [view email]
[v1] Fri, 11 Apr 2025 03:48:57 UTC (39,031 KB)
[v2] Mon, 16 Jun 2025 22:24:13 UTC (19,313 KB)
[v3] Mon, 27 Jul 2026 22:49:42 UTC (21,073 KB)